`timescale 1ns / 10ps
`define clock_period 20

module breathing_running_led_demo4_tb;

	reg clk_50M;
	reg rst_n;
	wire[7:0] led_out;

	breathing_running_led_demo4 test0(
		.Clk_50M(clk_50M),
		.Rst_n(rst_n),
		.Led_out(led_out)
	);
	
	always #(`clock_period / 2) clk_50M = ~clk_50M;
	
	initial begin
		rst_n = 1'b0;
		clk_50M = 1'b0;
		#(`clock_period)
		rst_n = 1'b1;
		
		#(`clock_period * 51200 * 20 * 32)
		#(`clock_period * 51200 * 20 * 32)
		#(`clock_period * 51200 * 20 * 32)
		#(`clock_period * 51200 * 20 * 32)
		#(`clock_period * 51200 * 20 * 32)
		
		$stop;
		
	end

endmodule
